To increase the benefits from trials with test chips (with new designs), typically made through MPW, or shared wafers or dedicated test runs, a Generic Test Package has been developed.
This package is able to adopt any chip size between 4x4 mm and 10x12mm.
Datasheet available at: IPPS_DATASHEET -Standard & Custom Packaging Service for ASPICs.pdf
Package and packaging of your Photonic Integrated Circuit has large influence on the final performance of your system. We have learned the hard way how to get maximal performance with limited effort. One of the lessons learned is to fit the PIC to the package and packaging equipment and not the other way around; especially for lower and medium volume applications.
Therefore we made available a set of packaging design rules, which are updated regularly. Download the actual datasheet (pdf) or get in touch with PhoeniX Software, that provides our packaging rules as design template for OptoDesigner (www.phoenixbv.com).
Design rules available at: G5-rev1_1-design rules final.pdf